verification « Pune's Semi/EDA & Embedded Forum

Free Event: Advanced System Verilog Tips Including OVM & UVM Tips by Cliff Cummings

By punechips

Cliff Cummings photograph

SystemVerilog Guru Cliff Cummings is back in town and he will be holding another seminar on April 19th at the MCCIA auditorium on Senapati Bapat Road from 4:00pm to 7:30pm. Most recently, Cliff was here in November 2009 and this seminar gives a great opportunity for engineers to re-engage with him. This event is completely free, but registration is required. Please visit this link to register and view the agenda.

Continue reading Free Event: Advanced System Verilog Tips Including OVM & UVM Tips by Cliff Cummings

Chip Design Verification: Test-plan/Coverage Plan

By punechips

photo credit: oskay

This is the second in the blog series titled Field Manual for Verification Planning written for PuneChips by Suhas Belgal . The blogs deal with functional verification of digital ICs and cover mostly the pre-silicon verification phase.

Continue reading Chip Design Verification: Test-plan/Coverage Plan

Introduction to Chip Verification Planning

By punechips

This is the first in a series of blogs written for PuneChips by Suhas Belgal titled Field Manual for Verification Planning. The blogs deal with functional verification of digital ICs and cover mostly the pre-silicon verification phase.

Continue reading Introduction to Chip Verification Planning

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Free Event: Advanced System Verilog Tips Including OVM & UVM Tips by Cliff Cummings

Chip Design Verification: Test-plan/Coverage Plan

Introduction to Chip Verification Planning

PuneChips Calendar

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